Computing hardware and software
The USQCD Collaboration designs, constructs and operates large scale
computing systems for lattice QCD calculations with support from the
Department of Energy. It has proven more cost effective to build
computers optimized for QCD, than to make use of general purpose
supercomputers, because in doing so one can take optimal advantage of
simplifying features of lattice QCD, such as regular grids, uniform and
predictable communications, and relatively low memory and I/O requirements.
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QCDOC daughter cards.
The QCDOC.
The QCDOC (right) was specially designed by a collaboration centered on
Columbia University. It is constructed of 12,288 small, low-power processing
nodes made up of a single IBM-manufactured ASIC (Applications Specific
Integrated Circuit) with a companion 128-Mbyte memory module. These
nodes are interconnected with a 6-dimensional toroidal mesh network.
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Clusters at Fermilab.
Clusters at JLab.
Commodity hardware for lattice QCD has been developed by a team centered at
Fermilab and JLab.
By selecting the most cost effective and appropriately balanced
combinations of processor and network interconnect, as opposed to the
products which individually had the best performance, and by taking
advantage of the modest requirements for memory size and disk
bandwidth, large scale clusters (below) have been constructed
with better price/performance than any existing general purpose parallel
computing platform.
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Community software has been developed by the USQCD Collaboration under a grant from the DOE's Scientific Discovery through Advanced Computing
(SciDAC) Program.
This enables the development of highly efficient code for clusters, the
QCDOC, and commercial supercomputers.
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